Why Canon Nanotechnologies has a low Cost of Ownership advantage
Achieving low Cost of Ownership (CoO) isn’t as simple as building a tool with high throughput. This list of significant contributors to CoO is lengthy. On the tool side, they include such items as the light source and optic elements. Complex and costly resists which are inefficiently applied with a spin-on track-based process also add cost. Recently, however, with the introduction of spacer based processes, CoO includes a new list of contributors such as:
- Customized spacer deposition
- Back-etches and transfer etches
- Additional masking layers that turn simple line and space patterns
Lithography fixed costs are relatively low for imprint, as expensive precision lenses, mirrors and lasers required by 193nm and EUV are not required. The compact form-factor enables multiple imprint modules to be “clustered” in much the same way as is practiced by etch and deposition tool suppliers, thereby multiplying throughput while sharing common sub-systems among the cluster. Such an approach has been successfully demonstrated with Molecular Imprints’ HD7000 system in the hard disk drive segment.
Imprint lithography is also a highly efficient process: In contrast to the recent need for three 193i lithography passes, the imprint patterning process can be performed in a single pass, regardless of CD, thanks to recent advances in imprint mask pattern fidelity. Additionally, the imprint process is environmentally friendly. With a Drop on Demand deposition approach that uses a self-contained jetting module and a Drop Pattern Generator System, resist waste is reduced dramatically (by >99%) compared with standard track-based systems, while completely eliminating the need for wet developer hardware and chemicals.
Masks represent a significant and rapidly growing cost element in leading-edge lithography. This would also be true for imprint lithography, were it not for the ability to employ mask replication to fabricate many working masks from a single e-beam written “master”. The replication process is particularly valuable in high wafer volume applications such as non-volatile memory or DRAM manufacture.
The dramatic reduction in CoO relative to other sub-20nm approaches (a legacy 45nm 193i process is also included as a reference) is illustrated in the Figure below. It is clear that imprint provides a lower fixed cost than other sub-20nm lithography options.
It is also important to note that imprint lithography is also not subject to the constraints in field size that stem primarily from restrictions in lens design. Larger imprint fields translate to fewer total imprinted fields, higher throughput and reduced cost of ownership.